Embodiments of the present disclosure relate to wafer flatness control in semiconductor device fabrication.
Wafer flatness has a very large influence on semiconductor device fabrication because of the impact it can have on the ability of photolithograph systems to effectively project device patterns. Severe changes in surface topography within the area of exposure, however, can alter the device feature patterns and, ultimately, lead to potential die yield loss. For accurate projection, it is thus important to expose a pattern of light on a wafer that is relatively flat or planar. Wafer flatness is also important for other fabrication processes. For example, during the bonding process, the flatness of each wafer to be bonded needs to be controlled within a reasonable deviation range to ensure direct contact of the two bonding surfaces.